Rensselaer Polytechnic Institute

Troy, NY

 

 

 

Electrical, Computer, and Systems Engineering Department

 

:index_files:ECSE.png

 

A

Cadence® University Program Member

 

:index_files:image003.png

 

The ECSE Dept. gratefully acknowledges the generous support of Cadence Design Systems through their university program for providing EDA tools used in classes and several ongoing research efforts within the department.

 

Classes using Cadence tools:

Electronic Instrumentation: ENGR-2300

Circuits course for non-EEs, covering linear RLC circuits, filters, strain gauges & bridges, op amps & Schmitt triggers, logic gates & flip-flops, diode circuits and steady-state Laplace transforms with simulations and laboratory exercises

PSpice, Capture CIS

Electrical Circuits: ECSE-2010

First circuits course, covering linear RLC circuits, controlled sources, op amps, filters and Laplace transforms with simulations and laboratory exercises

PSpice, Capture CIS

Introduction to Electronics: ECSE-2050

Introductory analog electronic circuit design, analysis and simulation

PSD, PSpice, Capture CIS

VLSI Design: ECSE-4220 (09/2011)

VLSI Design: ECSE-4220 (11/2003)

Introduction to VLSI design - logic circuit design, layout, simulation, & verification with CMOS devices using ICFB, LVS, Spectre, & VHDL

IC, LDV

Advanced VLSI Design: ECSE-6680

VLSI design with device modeling & design for test, SPICE simulation, placement & routing, and high level design description using ICFB, LVS, Spectre, & VHDL

IC, LDV

VLSI Design Automation: ECSE-6690

Advanced design with standard cells & auto routing with BiCMOS HBTs using ICFB, LVS, VHDL, Verilog, Spectre, & ICCraftsman

IC, ICC, LDV

 

 

Research Programs using Cadence tools:

Douglas Mercer '77 Laboratory

Laboratory for Student Exploration and Innovation (student projects designing analog and digital circuits: PCB layouts, component pick & place, wave soldering, test instrumentation, ...)

PSD, PSpice, Capture CIS

SiGe Design Group

High speed custom analog and digital circuit design, layout, parasitic extraction, simulation, verification, & fabrication with SiGe BiCMOS HBTs using ICFB, LVS, DRC Spectre, & VHDL

IC, ADVIC, LDV

Interconnect Focus Center

On-Chip Memory in 2D & 3D Technologies

Design and layout of memory cells for optimized performance of interconnect and devices in 2 and 3D with MOSFETs using layout tools, LVS and simulations

Monolithic, Point-of-Load DC-DC Converter (joint with Center for Power Electronics Sys.)

Design of high-speed DC-DC converters for power delivery to high performance ICs using layout tools, LVS and simulations

IC

Electrical Impedance Tomography

Developing circuit boards for a series of non-invasive medical imaging devices, Adaptive Current Tomographs (ACT), which produce images of the interior of the body from electrical measurements made using electrodes placed on its surface

PSD

Center for Power Electronics Systems

Designing masks and models for simulation and fabrication of Si and SiC power devices using ICFB

IC

SiGe High-Performance A/D Conversion

Design and fabrication of high-resolution, high-performance analog to digital converters and operational transconductance amplifiers with SiGe BiCMOS technology using layout tools, LVS, simulations and DRC

IC, LDV

 

 

 

This site is maintained by Russell Kraft, (e-mail:  ). 

Last updated July 10, 2017

 

Cadence is a registered trademark of

Cadence Design Systems, Inc.,

2655 Seely Avenue,

San Jose, CA 95134

 

"Information is provided 'as is' without warranty of any kind. No statement is made and no attempt has been made to examine the information, either with respect to operability, origin, authorship, or otherwise. Please use this information at your own risk. We recommend using it on a copy of your data to be sure you understand what it does under your conditions. Keep your master intact until you are satisfied with the use of this information within your environment."

 

Web page guidelines

 

Each university that participates in the Cadence(r) University Program is required to maintain a web page that abides by the following guidelines:

 

 The web page must be accessible to the public (that is, not require any passwords)

 

The web page must clearly indicate the name of the university and include the "Cadence University Program Member" subtitle

 

The web page must clearly indicate that the page is only Cadence-information related (that is, it does not include information on any other vendor's products on this page)

 

The web page must not be called a "Cadence Homepage"

 

Ensure proper use of the name Cadence: Cadence is the name of a company; students do not "learn Cadence"-they learn about Cadence products

 

This web page should be linked from the licensing department's top-level page

 

The content of the page should include how Cadence products are used in classes and for which academic research projects

 

The web page must include the name and contact information of the person responsible for the site, and the date the site was last updated

 

The web page must include the following footnote at the bottom of the page: "Cadence is a registered trademark of Cadence Design Systems, Inc., 2655 Seely Avenue, San Jose, CA 95134."

 

Additional material developed by the university to aid in use of Cadence software is optional; if such material is included on the web page, please include the following disclaimer:

 

"Information is provided 'as is' without warranty of any kind. No statement is made and no attempt has been made to examine the information, either with respect to operability, origin, authorship, or otherwise. Please use this information at your own risk. We recommend using it on a copy of your data to be sure you understand what it does under your conditions. Keep your master intact until you are satisfied with the use of this information within your environment."