In the last few years, the interests in quantum computing has increased substantially within the EE community. A significant engineering effort is required to bring the quantum computing outside the physics research labs into potential future commercialization. Beside the fabrication of reliable qubits, other challenges such as control electronics, interconnect and packaging must be solved before a fault tolerant quantum computer can be scaled to a large number of qubits. This talk will take an IC designer perspective to briefly introduce few of the basic concepts of quantum computing, focusing on some aspects of the control systems required to manipulate and read-out quantum states of qubits. It will then try to address why and how mixed-signal and RFIC design combined with large scale integration has the potential of accelerating the implementation of a fault-tolerant scalable quantum computer.
Stefano Pellerano received the Laurea Degree (summa cum laude) and the Ph.D. degree in electronics
engineering from the Politecnico di Milano, Milan, Italy, in 2000 and in 2004, respectively. During
his Ph.D., his activity was focused on the design of fully integrated low-power frequency synthesizers
for WLAN applications. In 2003 he has been a consultant with Agere Systems (former Bell Labs) in
Allentown, PA. Since 2004 he has been with Intel Labs, in Hillsboro, OR. He is now Principal Engineer
leading the Next Generation Radio Integration Lab, where he drives several research activities
focused at enabling radio circuit integration in deeply-scaled CMOS technologies. His main research
contributions include MIMO transceivers for WiFi, digital PLLs, high-efficient digital architectures for
polar and outphasing transmitters, mm-wave radio transceiver and phased-array systems, and lowpower
radios. For the last few years, he has also been exploring cryogenic CMOS integrated electronics
for qubit control in fault tolerant scalable quantum computers. Stefano has authored or co-authored
more than 50 IEEE conference and journal papers, one book chapter and more than 15 issued
patents. He served as the Technical Program Chair and General Chair for the IEEE Radio Frequency
Integrated Circuit (RFIC) Symposium in 2018 and 2019 respectively and he is now part of the RFIC
Executive Committee. He is currently serving as the Wireless Subcommittee Chair for the IEEE International
Solid-State Circuit Conference (ISSCC).